`timescale 1ns/1ns
module tb_TopKeyBeep ();

    reg clk;
    reg rst_n;
    reg key_in;

    // output declaration of module TopKeyBeep
    wire beep;

    always #10 clk=~clk;

    TopKeyBeep #(
                   .DEBOUNCE_TIME(1_0)
               ) u_TopKeyBeep(
                   .clk    	(clk     ),
                   .rst_n  	(rst_n   ),
                   .key_in 	(key_in  ),
                   .beep   	(beep    )
               );


    initial begin
        clk<=1'b0;
        rst_n<=1'b0;
        key_in<=1'b1;
        #100
         rst_n<=1'b1;
        #100
         key_in<=1'b0;
        #500
         key_in<=1'b1;
        #300
         key_in<=1'b0;
        #500
         key_in<=1'b1;


    end


endmodule
